About Software Radio

In conventional wireless communication systems, the critical lower layer processing, that is, the physical layer (PHY) and medium access control (MAC), is typically implemented in ASIC (Application Specific Integrated Circuits) chips, due to the high-computational and real-time requirements. Designing ASIC is costly, both economically and time-wise. It is also fixed, and therefore, once it is delivered, it cannot be changed or upgraded. The lack of flexibility and programmability makes experimental research in wireless communication become very difficult, especially for research groups in academics. The wireless and networking research group in Microsoft Research Asia in Beijing is developing a new high-performance wireless platform purely based on software running on a low-cost, commodity PC. The platform, called Sora, provides a convenient way for experimenting with novel wireless technologies.

Platform Dilemma

Software radio (or Software Defined Radio, SDR) holds the promise of fully programmable wireless communication systems, effectively supplanting current technologies that have the lowest communication layers implemented primarily in fixed, custom hardware circuits. Realizing this promise in practice, however, has presented developers with a dilemma. Many current SDR platforms are based on either programmable hardware, such as field programmable gate arrays (FPGAs), or embedded digital signal processors (DSPs). Such hardware platforms can meet the processing and timing requirements of modern high-speed wireless protocols, but programming FPGAs and specialized DSPs are difficult tasks. Developers have to learn how to program to each particular embedded architecture, often without the support of a rich development environment of programming and debugging tools. Hardware platforms can also be expensive.

In contrast, SDR platforms based on general-purpose processor (GPP) architectures, such as commodity PCs, have the opposite set of tradeoffs. Developers program to a familiar architecture and environment using sophisticated tools, and radio front-end boards for interfacing with a PC are relatively inexpensive. However, since PC hardware and software have not been designed for wireless signal processing, existing GPP-based SDR platforms can achieve only limited performance. For example, the popular GNU Radio/USRP platform achieves only a few hundred Kbps throughput on an 8MHz channel, whereas modern high-speed wireless protocols like 802.11 support multiple Mbps data rates on a much wider 20MHz channel. These constraints prevent developers from using such platforms to achieve the full fidelity of state-of-the-art wireless protocols while using standard operating systems and applications in a real environment.

Resolving the Dilemma

The Wireless and Networking Group in Microsoft Research Asia, has resolved the SDR platform dilemma by developing Microsoft Research Software Radio (Sora), a fully programmable software radio platform that provides the benefits of both SDR approaches. With Sora, developers can implement and experiment with high-speed wireless protocol stacks (that is, IEEE 802.11a/b/g) by using commodity general-purpose PCs. Developers program in familiar programming environments with powerful tools on standard operating systems. Software radios implemented on Sora appear like any other network device, and users can run unmodified applications on their software radios with the same performance as commodity hardware wireless devices.

To develop such a high-speed wireless platform on general-purpose PC architectures is very challenging:

• Transferring high-fidelity digital waveform samples into PC memory for processing requires very high bus throughput. Existing GPP platforms like GNU Radio (USRP) use USB 2.0 or Gigabit Ethernet, which cannot satisfy this requirement for high-speed wireless protocols.
• Physical layer (PHY) signal processing has very high computational requirements for generating information bits from waveforms, and vice versa, particularly at high modulation rates; indeed, back-of-the-envelope calculations for processing requirements on GPPs have instead motivated specialized hardware approaches in the past.
• Wireless PHY and media access control (MAC) protocols have low-latency real-time deadlines that must be met for correct operation. For example, the 802.11 MAC protocol requires precise timing control and ACK response latency on the order of tens of microseconds. Existing software architectures in the PC cannot consistently meet this timing requirement.

Sora uses both hardware and software techniques to address the challenges of using PC architecture for high-speed SDR:

• We have developed a new, inexpensive radio control board (RCB) with a radio frontend for transmission and reception. The RCB bridges an RF front-end with PC memory over the high-speed and low-latency PCIe bus. With this bus standard, the RCB can support 16.7Gbps (x8 mode) throughput with sub-microsecond latency, which together satisfies the throughput and timing requirements of modern wireless protocols while performing all digital signal processing on the host CPU and memory

Radio control board provides a high-speed PCIe interface to host PC.

• To meet PHY processing requirements, Sora makes full use of various features of widely adopted multi-core architecture in existing GPPs. The Sora software architecture also explicitly supports streamlined processing that enables components of the signal processing pipeline to efficiently span multiple cores.
• We change the conventional implementation of PHY components to extensively take advantage of lookup tables (LUTs), trading off computation for memory. These LUTs substantially reduce the computational requirements of PHY processing, while at the same time taking advantage of the large, low-latency caches on modern GPPs.
• Sora uses the SIMD (Single Instruction Multiple Data) extensions in existing processors to further accelerate PHY processing. With these optimizations, Sora can fully support the complete digital processing of 802.11b modulation rates on just one core, and 802.11a/g on two cores.
• To meet the real-time requirements of high-speed wireless protocols, Sora provides a new kernel service, core dedication, which allocates processor cores exclusively for real-time SDR tasks. We demonstrate that it is a simple yet crucial abstraction that guarantees the computational resources and precise timing control necessary for SDR on a GPP.

The Microsoft Research Asia team has developed a demonstration radio system, SoftWiFi, based on the Sora platform. SoftWiFi currently supports the full suite of 802.11a/b/g modulation rates, seamlessly interoperates with commercial 802.11 NICs, and achieves equivalent performance as commercial NICs at each modulation. Sora is the first SDR platform that enables users to develop high-speed wireless implementations, such as the IEEE 802.11a/b/g PHY and MAC, entirely in software on a standard PC architecture.